Register memory Register memory Hauv computer engineering, a register-memory architecture is an instruction set architecture that allow operations to be performed on (los yog los ntawm) memory, as well as registers. Yog hais tias lub architecture tso cai rau tag nrho cov operands nyob rau hauv lub cim xeeb los yog nyob rau hauv registers, los yog nyob rau hauv kev sib txuas, nws yog hu ua "sau npe ntxiv nco" architecture. https://en.wikipedia.org › wiki › Sau npe-memory_architecture
Register–nco architecture - Wikipedia
is qhov tsawg tshaj plaws thiab ceev tshaj plaws hauv lub computer. Nws tsis yog ib feem ntawm lub cim xeeb tseem ceeb thiab nyob hauv CPU hauv daim ntawv sau npe, uas yog cov ntaub ntawv tsawg tshaj plaws tuav cov ntsiab lus.
hom kev nco yog sau npe?
Registers are memories nyob rau hauv Central Processing Unit (CPU). Lawv muaj tsawg tus lej (tsis tshua muaj ntau tshaj 64 sau npe) thiab tseem me me, feem ntau cov ntawv sau npe tsawg dua 64 me me.
Qhov sib txawv ntawm kev sau npe thiab kev nco yog dab tsi?
Qhov sib txawv ntawm kev sau npe thiab kev nco yog sau npe tuav cov ntaub ntawv uas CPU tab tom ua tam sim no whereas, lub cim xeeb tuav cov ntaub ntawv uas yuav tsum tau ua. … Ntawm qhov tod tes, lub cim xeeb yog hu ua lub cim xeeb tseem ceeb ntawm lub khoos phis tawj uas yog RAM.
Puas sau npe tsis hloov pauv?
CPU cov ntawv sau npe feem ntau suav tias yog ib feem ntawm lub cim xeeb tseem ceeb (vim lawv nkag mus ncaj qha los ntawm CPU - saib Wikipedia) thiab yog feem ntau volatile, yog li nws zoo li qhov xav tau teb yog (1).
Puas sau npe cache nco?
Registers yog ib ntus nco units uas khaws cov ntaub ntawv thiab nyob rau hauv processor, es tsis txhob ntawm RAM, yog li cov ntaub ntawv yuav nkag tau thiab khaws cia sai dua. Cache nco yog lub cim xeeb ceev heev uas tau tsim rau hauv lub khoos phis tawj lub hauv paus ua haujlwm (CPU).
